- Fixed erroneous library generation when part number is omitted from first line of CSV file.
- Changed default output library to
kipart.libif no output library is specified.
- Changed default output CSV file of kilib2csv to
kipart.csvif no output CSV file is specified.
- Added reader for Lattice FPGA devices (except iCE40). (Thanks, Adrien Descamps!)
- Fixed issue #11 (blank lines in CSV file were skipped and multiple parts ran together).
- Fixed issue #18 (crash when symbol side for pin was left blank).
- Fixed problem caused by pin side designators not being lower-case (e.g., “Left”).
- Fixed Xilinx reader function to parse leading comments in their FPGA pin files.
- Added ability to create hidden pins.
- Fixed readers for Xilinx, STM32, PSoC devices.
- Pins on multiple sides of a symbol are now distributed in a more attractive manner.
- Extra stuff on starting line of library no longer kill kilib2csv.
- Fixed bug where kilib2csv was choking on footprint lists in part definitions.
- Added utility to test kilib2csv and kipart on randomly-generated CSV part files.
- kilib2csv utility added to convert KiCad schematic symbol libraries into CSV files suitable for input to KiPart.
- Use same type of sorting for unit names as for pin names so (for example) unit ‘ADC_12’ comes before unit ‘ADC_2’.
- Added reader for CSV-formatted pinout files exported from the STM32CubeMx tool. (Thanks, Hasan Yavuz OZDERYA!)
- Added reader for Xilinx Ultrascale FPGAs.
- Fixed insertion of spaces between groups of pins when pin number starts with ‘*’.
- Replaced call to warnings.warn with issues() function.
- fix_pin_data() now strips leading/trailing spaces from pin information.
- Fixed incorrect y-offset of pins for symbols that only have pins along the right side.
- The number of pins in a bundle is now appended to the pin name instead of an ‘*’.
- Added capability to insert non-existent “gap” pins that divide groups of pins into sections.
- future module requirement added to setup.py.
- Now runs under both Python 2.7 and 3.4.
- The bundling option now only bundles pins where that operation makes sense: power input pins (e.g., VCC and GND) and no-connect pins.
- Input data from the CSV file is now scanned for errors and fixed before it can cause problems in the library file.
- Added reader functions for Xilinx Virtex-6 and Spartan-6.
- Broke-out reader functions into separate modules.
- TXT and CSV files are now acceptable as part data files, but the reader has to be built to handle it.
- Fuzzy string matching is now used for the column headers.
- Choice-type options are now case-insensitive.
- Multiple parts can now be described in a single CSV file.
- Added function and option for reading Cypress PSoC5LP CSV files.
- Simplified key generators for sorting pins by name or number.
- Improved ordering of pins by name.
- Added option for approximate (fuzzy) matching for pin types, styles and orientations (sides).
- Multiple pins with the same name are now hidden by reducing their pin number size to zero (rather than enabling the hidden flag which can cause problems with power-in pins).
- Symbols can now have pins on any combination of left, right, top and bottom sides.
- Added option to append parts to an existing library.
- Refactored kipart routine into subroutines.
- Added documentation.
- Fixed calculation of pin name widths.
- Made CSV row order the default for arranging pins on the schematic symbol.
- Fixed sorting key routine for numeric pin numbers.
- Spaces are now stripped between fields in a CSV file.
- First release on PyPI.